The ESOC emulator suite (EMU), which is currently supporting the emulation of MIL-1750 (Military Standard Sixteen-Bit Computer Instruction Set Architecture) and ERC32 (Embedded Real time 32-bit Computer) on-board processors, is an important component of the ESOC simulators infrastructure. Nevertheless, it can be dealt with independently as it is completely decoupled from the other infrastructure components.
The emulator model has two main components - (1) an instruction set emulation core and (2) an interface shell. The instruction set emulation core comprises a RISC assembler or X86 C source that is the output from an emulator generator (EMUG). Tailoring of the emulator core is performed via the actual parameters used when instantiating the generic emulator generator.
The emulator generator may be configured to generate an emulator core source for use on x86-64 and x86-32 (Windows and GNU/Linux). Older systems can also be supported (Compaq OpenVMS Alpha, Alpha Windows NT PC or AD164 coprocessor card in a PC system).
The ESOC emulator suite includes the following components:
- ERC32 emulator
- MIL-STD-1750 emulator
- Emulator Shell
- Emulator Generator (EMUG)
- Extendible Meta Macro Assembler (EMMA)
- Emulator Test Harness (EMTH)
- Emulator Verification Suite (EMTS)
- VERSIM emulation Subsystem
- Example Build Procedures
The ERC32 emulator is a software emulation of the ERC32 microprocessor (Rad-Hard 32-bit SPARC V7 RISC Processor, including TSC695F, TSC695FL and TSC691E) and may be easily tailored to model ERC32 based systems. It may also be configured to model systems in which the memory or I/O systems deviate from that specified by the ERC32 standard.
The MIL-STD-1750 emulator provides a software emulation of MIL-STD-1750 compliant microprocessors. It may be tailored to model any MIL-STD-1750 compliant processor with both MIL-STD-1750A and MIL-STD-1750B being supported.
Finally, the emulator suite is available on GNU/Linux and is currently validated on SUSE Linux Enterprise Server (SLES).